Clang linker doesn't support NEXT. As we are not using the MEMORY command
to define discontinuous memory for the output file in any of the linker
scripts, ALIGN and NEXT are equivalent.
Change-Id: I867ffb9c9a76d4e81c9ca7998280b2edf10efea0
Signed-off-by: Roberto Vargas <[email protected]>
*bl1_entrypoint.o(.text*)
*(.text*)
*(.vectors)
- . = NEXT(PAGE_SIZE);
+ . = ALIGN(PAGE_SIZE);
__TEXT_END__ = .;
} >ROM
* as device memory. No other unexpected data must creep in.
* Ensure the rest of the current memory page is unused.
*/
- . = NEXT(PAGE_SIZE);
+ . = ALIGN(PAGE_SIZE);
__COHERENT_RAM_END__ = .;
} >RAM
#endif
*bl2_entrypoint.o(.text*)
*(.text*)
*(.vectors)
- . = NEXT(PAGE_SIZE);
+ . = ALIGN(PAGE_SIZE);
__TEXT_END__ = .;
} >RAM
KEEP(*(.img_parser_lib_descs))
__PARSER_LIB_DESCS_END__ = .;
- . = NEXT(PAGE_SIZE);
+ . = ALIGN(PAGE_SIZE);
__RODATA_END__ = .;
} >RAM
#else
* read-only, executable. No RW data from the next section must
* creep in. Ensure the rest of the current memory page is unused.
*/
- . = NEXT(PAGE_SIZE);
+ . = ALIGN(PAGE_SIZE);
__RO_END__ = .;
} >RAM
#endif
* as device memory. No other unexpected data must creep in.
* Ensure the rest of the current memory page is unused.
*/
- . = NEXT(PAGE_SIZE);
+ . = ALIGN(PAGE_SIZE);
__COHERENT_RAM_END__ = .;
} >RAM
#endif
__TEXT_RESIDENT_END__ = .;
*(.text*)
*(.vectors)
- . = NEXT(PAGE_SIZE);
+ . = ALIGN(PAGE_SIZE);
__TEXT_END__ = .;
#if BL2_IN_XIP_MEM
} >ROM
KEEP(*(cpu_ops))
__CPU_OPS_END__ = .;
- . = NEXT(PAGE_SIZE);
+ . = ALIGN(PAGE_SIZE);
__RODATA_END__ = .;
#if BL2_IN_XIP_MEM
} >ROM
* read-only, executable. No RW data from the next section must
* creep in. Ensure the rest of the current memory page is unused.
*/
- . = NEXT(PAGE_SIZE);
+ . = ALIGN(PAGE_SIZE);
__RO_END__ = .;
#if BL2_IN_XIP_MEM
* as device memory. No other unexpected data must creep in.
* Ensure the rest of the current memory page is unused.
*/
- . = NEXT(PAGE_SIZE);
+ . = ALIGN(PAGE_SIZE);
__COHERENT_RAM_END__ = .;
} >RAM
#endif
*bl2u_entrypoint.o(.text*)
*(.text*)
*(.vectors)
- . = NEXT(PAGE_SIZE);
+ . = ALIGN(PAGE_SIZE);
__TEXT_END__ = .;
} >RAM
.rodata . : {
__RODATA_START__ = .;
*(.rodata*)
- . = NEXT(PAGE_SIZE);
+ . = ALIGN(PAGE_SIZE);
__RODATA_END__ = .;
} >RAM
#else
* read-only, executable. No RW data from the next section must
* creep in. Ensure the rest of the current memory page is unused.
*/
- . = NEXT(PAGE_SIZE);
+ . = ALIGN(PAGE_SIZE);
__RO_END__ = .;
} >RAM
#endif
* as device memory. No other unexpected data must creep in.
* Ensure the rest of the current memory page is unused.
*/
- . = NEXT(PAGE_SIZE);
+ . = ALIGN(PAGE_SIZE);
__COHERENT_RAM_END__ = .;
} >RAM
#endif
*bl31_entrypoint.o(.text*)
*(.text*)
*(.vectors)
- . = NEXT(PAGE_SIZE);
+ . = ALIGN(PAGE_SIZE);
__TEXT_END__ = .;
} >RAM
. = ALIGN(8);
#include <pubsub_events.h>
- . = NEXT(PAGE_SIZE);
+ . = ALIGN(PAGE_SIZE);
__RODATA_END__ = .;
} >RAM
#else
* executable. No RW data from the next section must creep in.
* Ensure the rest of the current memory page is unused.
*/
- . = NEXT(PAGE_SIZE);
+ . = ALIGN(PAGE_SIZE);
__RO_END__ = .;
} >RAM
#endif
spm_shim_exceptions : ALIGN(PAGE_SIZE) {
__SPM_SHIM_EXCEPTIONS_START__ = .;
*(.spm_shim_exceptions)
- . = NEXT(PAGE_SIZE);
+ . = ALIGN(PAGE_SIZE);
__SPM_SHIM_EXCEPTIONS_END__ = .;
} >RAM
#endif
* as device memory. No other unexpected data must creep in.
* Ensure the rest of the current memory page is unused.
*/
- . = NEXT(PAGE_SIZE);
+ . = ALIGN(PAGE_SIZE);
__COHERENT_RAM_END__ = .;
} >RAM
#endif
*entrypoint.o(.text*)
*(.text*)
*(.vectors)
- . = NEXT(PAGE_SIZE);
+ . = ALIGN(PAGE_SIZE);
__TEXT_END__ = .;
} >RAM
. = ALIGN(8);
#include <pubsub_events.h>
- . = NEXT(PAGE_SIZE);
+ . = ALIGN(PAGE_SIZE);
__RODATA_END__ = .;
} >RAM
#else
* read-only, executable. No RW data from the next section must
* creep in. Ensure the rest of the current memory block is unused.
*/
- . = NEXT(PAGE_SIZE);
+ . = ALIGN(PAGE_SIZE);
__RO_END__ = .;
} >RAM
#endif
* as device memory. No other unexpected data must creep in.
* Ensure the rest of the current memory page is unused.
*/
- . = NEXT(PAGE_SIZE);
+ . = ALIGN(PAGE_SIZE);
__COHERENT_RAM_END__ = .;
} >RAM
*tsp_entrypoint.o(.text*)
*(.text*)
*(.vectors)
- . = NEXT(PAGE_SIZE);
+ . = ALIGN(PAGE_SIZE);
__TEXT_END__ = .;
} >RAM
.rodata . : {
__RODATA_START__ = .;
*(.rodata*)
- . = NEXT(PAGE_SIZE);
+ . = ALIGN(PAGE_SIZE);
__RODATA_END__ = .;
} >RAM
#else
* read-only, executable. No RW data from the next section must
* creep in. Ensure the rest of the current memory page is unused.
*/
- . = NEXT(PAGE_SIZE);
+ . = ALIGN(PAGE_SIZE);
__RO_END__ = .;
} >RAM
#endif
* as device memory. No other unexpected data must creep in.
* Ensure the rest of the current memory page is unused.
*/
- . = NEXT(PAGE_SIZE);
+ . = ALIGN(PAGE_SIZE);
__COHERENT_RAM_END__ = .;
} >RAM
#endif
/*
- * Copyright (c) 2017, ARM Limited and Contributors. All rights reserved.
+ * Copyright (c) 2017-2018, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
*(arm_el3_tzc_dram)
__EL3_SEC_DRAM_UNALIGNED_END__ = .;
- . = NEXT(PAGE_SIZE);
+ . = ALIGN(PAGE_SIZE);
__EL3_SEC_DRAM_END__ = .;
} >EL3_SEC_DRAM
}
* executable. No RW data from the next section must creep in.
* Ensure the rest of the current memory page is unused.
*/
- . = NEXT(PAGE_SIZE);
+ . = ALIGN(PAGE_SIZE);
__RO_END__ = .;
} >RAM
* as device memory. No other unexpected data must creep in.
* Ensure the rest of the current memory page is unused.
*/
- . = NEXT(PAGE_SIZE);
+ . = ALIGN(PAGE_SIZE);
__COHERENT_RAM_END__ = .;
} >RAM2
#endif